Ask
Login
TAGGED IN

Digital Vlsi Design

Follow this tag to get notifications whenever a new post is added

ALL TAGS
0
votes
1
answer
3.5k
views
1
answer
What is Elmore delay model? What is the effect of interconnect parasitic on delay? How delay can be reduced?
digital vlsi design updated 2.7 years ago by yashbeer ★ 11k
1
vote
1
answer
1.4k
views
1
answer
Explain various technique of clock generation. Discuss 'H' tree clock distribution.
digital vlsi design updated 20 months ago by sagarkolekar ★ 11k
0
votes
1
answer
764
views
1
answer
Explain Clock Generation
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
3
votes
1
answer
17k
views
1
answer
Explain Domino Logic circuit
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
4.4k
views
1
answer
Explain Pseudo NMOS in detail
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
2
votes
1
answer
7.9k
views
1
answer
Explain Carry Select Adder
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
13k
views
1
answer
Explain Carry Save Adder
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
727
views
1
answer
Explain CLA adder and Ripple carry adder
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
3.2k
views
1
answer
Explain Full Adder
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
14k
views
1
answer
Explain Barrel Shifter
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
2
votes
1
answer
25k
views
1
answer
Explain Array Multiplier
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
2.3k
views
1
answer
Explain Clock Distribution
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
919
views
1
answer
Explain Clock Stabilization
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
1
vote
1
answer
1.6k
views
1
answer
Explain Input Circuits
digital vlsi design updated 5.3 years ago by vedantchikhale • 830
0
votes
1
answer
1.7k
views
1
answer
Explain Dynamic CMOS
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
931
views
1
answer
Explain Static CMOS
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
1.1k
views
1
answer
Explain Interconnect Scaling
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
803
views
1
answer
Explain NOR Flash Memory
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
1.4k
views
1
answer
Explain NAND flash memory
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
750
views
1
answer
Draw the DRAM Layout
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
8.3k
views
1
answer
Explain DRAM operation
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
1.2k
views
1
answer
Explain SRAM design layout
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
2.7k
views
1
answer
Explain SRAM in detail
digital vlsi design updated 5.2 years ago by vedantchikhale • 830
0
votes
1
answer
9.3k
views
1
answer
Explain ROM Array
digital vlsi design updated 5.3 years ago by vedantchikhale • 830
0
votes
1
answer
1.5k
views
1
answer
Explain Output Circuits
digital vlsi design updated 5.3 years ago by vedantchikhale • 830
<prev • 51 results • page 1 of 3 • next >